A conventional inductor, as we know, may utilize planar inductor as designs of inductor pattern and trace pattern in a same plane. For the reason that the inductor and trace are located in the same plane, a disturbance from parasitic capacitance is occurred and has to be overcome. In addition, the corresponding chip size can not be decreased, and the planar inductor merely forms a vortex structure instead of a toroid structure in a same radius.